1. Field of the Invention
The present invention relates to a multi-layer wiring board suited for a package for holding a semiconductor device and to a method of producing the same.
2. Description of the Related Art
In recent years, electronic equipment have been produced in ever small sizes. Recent development of portable data terminals and widespread use of a so-called mobile computing operated while carrying a computer with the user, are further demanding a multi-layer wiring board fabricated in a further decreased size, in a more reduced thickness and having more highly dense wiring layers.
There have further been widely used electronic equipment that must operate at high speeds as represented by communication equipment. The demand for a high-speed operation includes a variety of requests such as precise switching for the signals of high frequencies. To cope with such electronic equipment, it has been urged to provide a multi-layer printed wiring board suited for high-speed operation.
To carry out a high-speed operation, it is necessary to shorten the length of the wiring thereby to shorten the time required for the electric signals to propagate. In order to shorten the length of the wiring, it has been demanded to provide a small and thin multi-layer wiring board having wirings of a small width and a highly dense wiring layer having a small gap among the wirings.
In order to cope with a demand for such a highly dense wiring layer, there has been employed a production method called build-up method. Under the JPCA standard, the basic structures of the build-up method can be divided into two, i.e., (1) a base+build-up method, and (2) a whole layer build-up method.
(1) In the base+build-up method, the multi-layer wiring board is produced in a manner as described below.
That is, there is prepared a core board which is an insulating board such as a glass epoxy substrate having, on the surfaces thereof, a conductor wiring layer formed of a metal foil like a copper foil and having, as required, via-conductors.
A photosensitive resin is applied onto the surfaces of the core board and is developed by being exposed to light thereby to form a photosensitive insulating layer having through-holes.
Then, a metal layer such as of copper is plated onto the whole surfaces (inclusive of through-holes) of the photosensitive insulating layer, a photosensitive resist is applied onto the plated layer, which is, then, developed and etched by being exposed to light through a mask of the shape of a circuit pattern to fabricate a conductor wiring layer.
Steps are repeated for applying the photosensitive resin and for forming the conductor wiring layer on the thus formed insulating layer having the conductor wiring layer, thereby to obtain a multi-layer wiring board.
(2) A method of producing a multi-layer wiring board by the whole layer build-up has been disclosed in, for example, Japanese Patent No. 2587593. That is, through-holes are formed in the insulating sheet by a laser and are filled with an electrically conducting paste thereby to form via-conductors in the insulating sheet. Then, a conductor wiring layer is formed on the surface of the insulating sheet so as to be electrically connected to the via-conductors, thereby to obtain a wiring sheet. The thus formed wiring sheet is repetitively laminated thereby to obtain a multi-layer wiring board.
According to the base+build-up method (1), however, the photosensitive epoxy resin used for forming the insulating layer has a low glass transition point and is sensitive to light involving such a defect that it absorbs water much. That is, when left to stand under high-temperature and high-humidity conditions, the multi-layer wiring substrate obtained according to this method arouses a problem of decreased insulation. It can be further contrived to form an insulating layer by using a resin which absorbs water little, such as an arylated polyphenylene ether (A-PPE) resin or a BT (bismaleimidetriazine) resin instead of using the epoxy resin. However, the resin which absorbs water little has a low polarity and exhibits poor wettability to the surface of a metal which has a high polarity. That is, with the multi-layer wiring board in which the insulating layer is formed of a resin that absorbs little water, the adhesion or intimate contact is not accomplished between the insulating layer and the conductor wiring layer, very easily permitting the passage of water that is a factor for deteriorating the characteristics of the wiring board. When the pitch is decreased among the via-conductors that are formed in many number in the insulating layer, therefore, the insulating resistance decreases among the via conductors. When the diameter of the through-holes forming the via-conductors is decreased, further, a problem such as an increase in the resistance of the via-conductors appears conspicuously making it very difficult to fabricate a highly dense wiring board.
Further, the surface of the core board is rugged to a degree comparable to the thickness of the conductor wiring layer formed of the copper foil, and the photosensitive resin used for the build-up method is a liquid. Accordingly, ruggedness in the surface of the core board is reflected up to the surface of the multi-layer wiring board that is obtained. Such a multi-layer wiring board is not suited for the applications where flatness is required, such as mounting the silicon chips like flip chips. Through the surface temperature cycle testing and high-temperature high-humidity testing, further, it has been confirmed that the peeling easily occurs on the interface between the core board and the insulating layer that is built up. It is considered that the peeling on the interface stems from the presence of the above-mentioned ruggedness.
A variety of countermeasures have been proposed for solving the above-mentioned problems. The journal xe2x80x9cElectronics Mounting Technologyxe2x80x9d, Vol. 14, No. 1, January 1998 teaches a flat multi-layer wiring board obtained by transferring a circuit pattern formed on a stainless steel by the pattern-plating method onto the surface of an insulating layer that is built up relying upon the laminate pressing method. However, the adhering force has not been improved yet between the core board and the insulating layer that is built up still leaving a problem concerning reliability.
According to the whole layer build-up method (2), the via-conductors are formed by filling the through-holes with the electrically conducting paste. Through the reliability testing such as high-temperature standby testing and pressure cooker testing (PCT), however, it has been confirmed that the via-conductors are oxidized causing an increase in the electric resistance. When the pitch of the via-conductors is decreased, further, the insulation resistance among the via-conductors decreases like that of the above-mentioned base+build-up method (1). That is, since the adhering force is poor on the interface between the insulating layer and the conductor wiring layer or the via-conductors, water which is a factor of deterioration easily infiltrates into the insulating resin layer. Besides, water that has infiltrated into the insulating layer further infiltrates into the via-conductors arousing a problem of rise in the resistance of the via-conductors.
It is therefore an object of the present invention to provide a highly reliable multi-layer wiring board which features an increased adhering force between the conductor wiring layer and the insulating layer, prevents water from infiltrating into the interface between the conductor wiring layer and the insulating layer, prevents water from infiltrating into the via-conductors from the insulating layer, and does not permit characteristics to be deteriorated even after left in a high-temperature and high-humidity environment for extended periods of time.
According to the present invention, there is provided a multi-layer wiring board comprising insulating layers of a thermosetting resin having through-holes formed therein, conductor wiring layers buried in the surfaces of said insulating layers, and via-conductors formed by filling said through-holes with an electrically conducting paste, the via-conductors being electrically connected to said conductor wiring layers, wherein coupling layers comprising a silane coupling agent are formed in the interfaces between said conductor wiring layers and said via-conductors or said insulating layers.
According to the present invention, there is further provided a method of producing multi-layer wiring boards comprising the steps of:
(i) sticking a metal foil onto the surface of a resin film by using an adhesive;
(ii) forming a resist having a wiring pattern on the surface of said metal foil, forming a conductor wiring layer on the surface of the resin film by etching, and removing the resist;
(iii) applying a silane coupling agent onto the upper surface and/or the side surfaces of the conductor wiring layer formed on the resin film;
(iv) forming through-holes in an insulating sheet in the B-stage containing a thermosetting resin, and filling the through-holes with an electrically conducting paste containing a metal powder to thereby form via-conductors;
(v) laminating the resin film on the insulating sheet in such a manner that the conductor wiring layer coated with the silane coupling agent is overlapped on said via-conductors, followed by pressing so that the conductor wiring layer is buried in the surface of the insulating sheet, and peeling off said resin film thereby to transfer said conductor wiring layer onto the surface of the insulating sheet thereby to prepare a wiring sheet; and
(vi) laminating said wiring sheet on another wiring sheet, and curing them at one time while applying a pressure.
In the multi-layer wiring board of the present invention, coupling layers comprising a silane coupling agent are present in the interfaces between the conductor wiring layers and the via-conductors or the insulating layers. The coupling layers work to markedly improve the adhesion or intimate contact between the conductor wiring layers and the via-conductors, or to markedly improve the adhesion or intimate contact between the conductor wiring layers and the insulating layers making, as a result, it possible to effectively prevent the infiltration of water and effectively avoiding the deterioration in the characteristics of when, for example, the conductor wiring layers and via-conductors are finely and densely formed.
In the present invention, the coupling layer comprising the silane coupling agent is provided in the interface between the conductor wiring layer and the via-conductors or in the interface between the conductor wiring layer and the insulating layer. In order to increase the adhering force in the interface, it is desired that the surface of the conductor wiring layer on where the coupling layer is provided has been roughened so as to possess a surface roughness (Ra) of not smaller than 0.2 xcexcm. This enables the conductor wiring layer to firmly mesh with the via-conductors or with the insulating layer, and the adhering force markedly increases between them.
The silane coupling agent forming the coupling layer is in itself an electrically insulating compound. It is therefore desired that the coupling layer formed in the interface between the conductor wiring layer and the via-conductors has a thickness in a range of from 10 to 100 nm. When the coupling layer is thickly formed, reliability in the electric connection may be spoiled between the conductor wiring layer and the via-conductors. Upon roughening the surface of the conductor wiring layer to lie within the above-mentioned range, further, the particles of silane coupling agent enter into the recessed portions in the surface of the conductor wiring layer, and a direct contact is maintained between the conductor wiring layer and the via-conductors effectively avoiding a decrease in the reliability of electric connection between them.
In the present invention, it is desired that the thermosetting resin used for forming the insulating layer has a water-absorbing factor of not larger than 0.1% from the standpoint of suppressing the absorption of water by the wiring board.
Since the conductor wiring layer is buried in the surface of the insulating layer, the multi-layer wiring board of the present invention exhibits excellent smoothness lending itself well for mounting flip chips and, besides, effectively prevents a decrease in the characteristics caused by the infiltration of water. Even when the pitch is decreased among the via-conductors, therefore, the insulation resistance does not decrease among the via-conductors. Even when the diameter of the via-conductors is decreased, the electric conductivity is not deteriorated, either. Therefore, the multi-layer wiring board of the present invention features a high reliability even when fine circuits are highly densely formed.